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The 432 project started in 1975 as the 8800, so-named as a follow-on to the existing 8008 and 8080 CPUs. The design was to consist of several separate chips working in parallel, notably the 2-chip GDP which was the main processor, and the IP (the 43203) which operated as a channel controller for I/O. It was a 32-bit design from the start. The three-chip system used about 250,000 logic gates, making it one of the largest designs of its era, the contemporary Motorola 68000 contained about 68,000 for instance, about 1/3rd of that for its microcode.
The GDP was split in two, one chip (the 43201) handling the fetching and decoding of the instructions, the other (the 43202) executing them. Like most Intel CPU designs, the 432 used a segmented memory system, with 2^24 segments of 64k each within the overall 2^32 byte address space. All memory handling was private, with user programs not able to handle memory directly. The chip supported data hiding directly, checking all memory accesses for type and permissions, thereby slowing memory access considerably. Most of this complexity was handled in microcode.
In 1983 Intel also released the MCU memory controller, as well as the BIU bus controller. The BIU was intended to allow for multi-processor systems with up to 63 nodes.
Several design features of the i432 conspired to make it much slower than it could have been. The two-chip implementation of the GDP limited it to speed of the motherboard's electical wiring, and the lack of reasonable caches and registers didn't help matters. The instruction set also hindered performance by using variable-length instructions, making decoding complex. In addition the BIU was designed to support fault-tollerant systems, and in doing so added considerable overhead to the bus, with up to 40% of the bus time in wait states.
A new implementation based on a RISC core was built in an Intel/Siemens project, resulting in the 960 MC. The 960 MC's core was used by Intel to create the i960 RISC CPU, by dropping many of the i432-support from the design. Although the 960 MC design predates it, the i960 was released first due to the considerably lower complexity.