Here is a list of Intel microprocessors:

• 4004
  • Introduced November 15, 1971
  • Clock speed 740 kHz
  • 0.06 MIPS
  • Bus Width 4 bits (multiplexed address/data due to limited pins)
  • PMOS
  • Number of Transistors 2,300 at 10 μm
  • Addressable Memory 640 bytes
  • Program Memory 4K bytes
  • World's first microprocessor
  • Used in Busicom calculator
  • Trivia: The original goal was to equal the clock speed of the IBM 1620; this was not quite met.
• 4040
  • Introduced TBD, 1974
  • Clock speed 740 kHz
  • 0.06 MIPS
  • Bus Width 4 bits (multiplexed address/data due to limited pins)
  • PMOS
  • Number of Transistors 3,000 at 10 μm
  • Addressable Memory 640 bytes
  • Program Memory 8K bytes
  • Interrupts
  • Enhanced version of 4004
• 8008
  • Introduced April 1, 1972
  • Clock speed 500 kHz (8008-1: 800 kHz)
  • 0.05 MIPS
  • Bus Width 8 bits (multiplexed address/data due to limited pins)
  • PMOS
  • Number of Transistors 3,500 at 10 μm
  • Addressable memory 16 kilobytes
  • Typical in dumb terminals, general calculators, bottling machines
  • Developed in tandem with 4004
  • Originally intended for use in the Datapoint 2200
• 8080
  • Introduced April 1, 1974
  • Clock speed 2MHz
  • 0.64 MIPS
  • Bus Width 8 bits data, 16 bits address
  • NMOS
  • Number of Transistors 6,000 at 6 μm
  • Addressable memory 64 kilobytes
  • 10X the performance of the 8008
  • Used in the Altair 8800, Traffic light controller, cruise missile
  • Required six support chips versus 20 for the 8008
• 8085
  • Introduced March 1976
  • Clock speed 5MHz
  • 0.37 MIPS
  • Bus Width 8 bits data, 16 bits address
  • Number of Transistors 6,500 at 3 μm
  • Used in Toledo scale
  • High level of integration, operating for the first time on a single 5 volt power supply, from 12 volts previously
• 8086
  • Introduced June 8, 1978
  • Clock speeds:
    • 5MHz with 0.33 MIPS
    • 8MHz with 0.66MIPS
    • 10MHz with 0.75 MIPS
  • Bus Width 16 bits data, 20 bits address
  • Number of Transistors 29,000 at 3 μm
  • Addressable memory 1 megabyte
  • 10X the performance of 8080
  • Used in portable computing
  • Instruction set backwards compatible to 8080
  • Used segment registers to access more than 64K of data at once, bane of programmers' existence for years to come
• 8088
  • Introduced June 1, 1979
  • Clock speeds:
    • 5MHz with 0.33 MIPS
    • 8MHz with 0.75 MIPS
  • Internal architecture 16 bits
  • External bus Width 8 bits data, 20 bits address
  • Number of Transistors 29,000 at 3 μm
  • Addressable memory 1 megabyte
  • Identical to 8086 except for its 8 bit external bus
  • Used in IBM PCs and PC clones
• 80186
  • Introduced 1982
  • Used mostly in embedded applications - controllers, point-of-sale systems, terminals, and the like
  • Included two timers, a DMA controller, and an interrupt controller on the chip in addition to the processor
  • Later renamed the iAPX 186
• 80188
  • Same as 80186 except with 8 bit external data bus
• 80286
  • Introduced February 1, 1982
  • Clock speeds:
    • 6MHz with 0.9 MIPS
    • 8MHz, 10MHz with 1.5 MIPS
    • 12.5MHz with 2.66 MIPS
  • Bus Width 16 bits
  • Included memory protection hardware to support multitasking operating systems with per-process address space
  • Number of Transistors 134,000 at 1.5 μm
  • Addressable memory 16 megabytes
  • Added protected-mode features to 8086 with essentially the same instruction set
  • 3-6X the performance of the 8086
  • Widely used in PC clones at the time
  • Can scan the Encyclopædia Britannica in 45 seconds
• 80386DX
  • Introduced October 17, 1985
  • Clock speeds:
    • 16MHz with 5 to 6 MIPS
    • 2/16/1987 20MHz with 6 to 7 MIPS
    • 4/4/1988 25MHz with 8.5 MIPS
    • 4/10/1989 33MHz with 11.4 MIPS (9.4 SPECint92 on Compaq/i 16K L2)
  • Bus Width 32 bits
  • Number of Transistors 275,000 at 1 μm
  • Addressable memory 4 gigabytes
  • Virtual memory 64 terabytes
  • First X86 chip to handle 32-bit data sets
  • Reworked and expanded memory protection support including paged virtual memory and virtual-86 mode, features required by Windows 95 and OS/2 Warp
  • Used in Desktop computing
  • Can address enough memory to manage an eight-page history of every person on earth
  • Can scan the Encyclopædia Britannica in 12.5 seconds
• 80386SX
  • Introduced June 16, 1988
  • Clock speeds:
    • 16MHz with 2.5 MIPS
    • 1/25/1989 20MHz with 2.5 MIPS, 25MHz with 2.7 MIPS
    • 10/26/1992 33MHz with 2.9 MIPS
  • Internal architecture 32 bits
  • External bus width 16 bits
  • Number of Transitors 275,000 at 1 μm
  • Addressable memory 16 megabytes
  • Virtual memory 256 gigabytes
  • 16-bit address bus enable low cost 32-bit processing
  • Built in multitasking
  • Used in entry-level desktop and portable computing
• 80486DX
  • Introduced April 10, 1989
  • Clock speeds:
    • 25MHz with 20 MIPS (16.8 SPECint92, 7.40 SPECfp92)
    • 5/7/1990 33MHz with 27 MIPS (22.4 SPECint92 on Micronics M4P 128k L2)
    • 6/24/1991 50MHz with 41 MIPS (33.4 SPECint92, 14.5 SPECfp92 on Compaq/50L 256K L2)
  • Bus Width 32 bits
  • Number of Transistors 1.2 million at 1 μm; the 50MHz was at 0.8 μm
  • Addressable memory 4 gigabytes
  • Virtual memory 64 terabytes
  • Level 1 cache on chip
  • 50X performance of the 8088
  • Used in Desktop computing and servers
• 80386SL
  • Introduced October 15, 1990
  • Clock speeds:
    • 20MHz with 4.21 MIPS
    • 9/30/1991 25MHz with 5.3 MIPS
  • Internal architecture 32 bits
  • External bus width 16 bits
  • Number of Transistors 855,000 at 1 μm
  • Addressable memory 4 gigabytes
  • Virtual memory 64 terabytes
  • First chip specifically made for portable computers because of low power consumption of chip
  • Highly integrated, includes cache, bus, and memory controllers
• 80486SX
  • Introduced April 22, 1991
  • Clock speeds:
    • 9/16/1991 16MHz with 13 MIPS, 20MHz with 16.5 MIPS
    • 9/16/1991 25MHz with 20 MIPS (12 SPECint92)
    • 9/21/1992 33MHz with 27 MIPS (15.86 SPECint92)
  • Bus Width 32 bits
  • Number of Transistors 1.185 million at 1 μm and 900,000 at 0.8 μm
  • Addressable memory 4 gigabytes
  • Virtual memory 64 terabytes
  • Identical in design to 486DX but without math coprocessor
  • Used in low-cost entry to 486 CPU desktop computing
  • Upgradable with the Intel OverDrive processor
• 80486DX2
  • Introduced March 3. 1992
  • Clock speeds:
    • 50MHz with 41 MIPS (29.9 SPECint92, 14.2 SPECfp92 on Micronics M4P 256K L2)
    • 8/10/1992 66 MHz with 54 MIPS (39.6 SPECint92, 18.8 SPECfp92 on Micronics M4P 256K L2)
  • Bus Width 32 bits
  • Number of Transistors 1.2 million at 0.8 μm
  • Addressable memory 4 gigabytes
  • Virtual memory 64 terabytes
  • Used in high performance, low cost desktops
  • Uses "speed doubler" technology where the microprocessor core runs at twice the speed of the bus
• 80486SL
  • Introduced November 9, 1992
  • Clock speeds:
    • 20MHz with 15.4MIPS
    • 25MHz with 19 MIPS
    • 33MHz with 25 MIPS
  • Bus Width 32 bits
  • Number of Transistors 1.4 million at 0.8 μm
  • Addressable memory 64 megabytes
  • Virtual memory 64 terabytes
  • Used in notebook PCS
• Pentium
  • Introduced March 22, 1993
  • Clock speeds:
    • 60MHz with 100 MIPS (70.4 SPECint92, 55.1 SPECfp92 on Xpress 256K L2)
    • 66 MHz with 112 MIPS (77.9 SPECint92, 63.6 SPECfp92 on Xpress 256K L2)
    • 75 MHz Introduced October 10, 1994
    • 90 MHz Introduced March 7, 1994
    • 100 MHz Introduced March 7, 1994
    • 120 MHz Introduced March 27, 1995
    • 133 MHz Introduced June, 1995
    • 150 MHz Introduced January 4, 1996
    • 166 MHz Introduced January 4, 1996
    • 200 MHz Introduced June 10, 1996
  • Bus width 64 bits
  • Address bus 32 bits
  • Number of transistors 3.1 million at 0.8 μm
  • Addressable Memory 4 gigabytes
  • Virtual Memory 64 terabytes
  • Pin count 273 PGA Package
  • Package dimensions 2.16" x 2.16"
  • Superscalar architecture brought 5X the performance of the 33MHz 486DX processor
  • Ran on 5volts of power
  • Used in desktops
• 80486DX4
  • Introduced March 7, 1994
  • Clock speeds:
    • 75MHz with 53 MIPS (41.3 SPECint92, 20.1 SPECfp92 on Micronics M4P 256K L2)
    • 100MHz with 70.7 MIPS (54.59 SPECint92, 26.91 SPECfp92 on Micronics M4P 256K L2)
  • Number of Transistors 1.6 million at 0.6 μm
  • Bus width 32 bits
  • Addressable memory 4 gigabytes
  • Virtual memory 64 terabytes
  • Pin count 168 PGA Package, 208 SQFP Package
  • Die size 345 Square mm
  • Used in high performance entry-level desktops and value notebooks
• Pentium Pro (200, 180, 166, 150 MHz)
  • Introduced November 1, 1995
• Pentium MMX (200 and 166 MHz)
  • Introduced January 8, 1997
• Pentium II (233, 266, and 300 MHz)
  • Introduced May 7, 1997
• Pentium MMX (233 MHz)
  • Introduced June 2, 1997
• Pentium Pro with 1MB L2 Cache (200 MHz)
  • Introduced August 18, 1997
• Mobile Pentium with MMX Technology (200 and 233 MHz)
  • Introduced September 8, 1997
• Mobile Pentium with MMX Technology (166 and 266 MHz)
  • Introduced January 12, 1998
• Pentium II (333 MHz)
  • Introduced January 26, 1998
• Mobile Pentium II (233 and 266 MHz)
  • Introduced April 2, 1998
• Pentium II (350 and 400 MHz)
  • Introduced April 15, 1998
• Celeron (266 MHz)
  • Introduced April 15, 1998
• Celeron (300 MHz)
  • Introduced June 9, 1998
• Pentium II Xeon (400 MHz)
  • Introduced June 29, 1998
• Celeron (300A and 333 MHz)
  • Introduced August 24, 1998
• Pentium II (450 MHz)
  • Introduced August 24, 1998
• Mobile Pentium II (300 MHz)
  • Introduced September 9, 1998
• Pentium II Xeon (450 MHz)
  • Introduced October 6, 1998
  • 512 KB L2 Cache
• Celeron (366 and 400 MHz)
  • Introduced January 4, 1999
• Pentium II Xeon (450 MHz)
  • Introduced January 5, 1999
  • 1 MB and 2 MB L2 Cache
• Mobile Pentium with MMX Technology (300 MHz)
  • Introduced January 7, 1999
• Mobile Celeron (266 and 300 MHz)
• Mobile Pentium II (300, 333, and 366 MHz)
• Pentium III (450 and 500 MHz)
  • Introduced February 26, 1999
  • Streaming SIMD Extensions
• Pentium(r) III Xeon(tm) Processor (500 MHz)
  • Introduced March 17, 1999
  • Number of Transistors 9.5 million at 0.25 μm
  • L2 cache is 512KB, 1MB, or 2MB
  • Processor Package Style is Single Edge Contact Cartridge (S.E.C.C.2)
  • System bus speed 100 MHz
  • System Bus Width 64 bit
  • Addressable memory 64 gigabytes
  • Used in business PCs, two-, four- and eight-way (and higher) servers and workstations
• Celeron (433 MHz)
  • Introduced March 22, 1999
• Mobile Celeron (333 MHz)
  • Introduced April 5, 1999
• Pentium III (550 MHz)
  • Introduced May 17, 1999
• Pentium III (600 MHz)
  • Introduced August 2, 1999
• Celeron (466 MHz)
• Celeron (500 MHz)
  • Introduced August 2, 1999
• Pentium(r) III Xeon(tm) Processor (550 MHz)
  • Introduced August 23, 1999
• Mobile Celeron (366 MHz)
• Mobile Celeron (400 MHz)
• Mobile Celeron (433 and 466 MHz)
• Pentium III (533 MHz)
  • Introduced September 27, 1999
• Mobile Pentium III (400, 450, and 500 MHz)
  • Introduced October 25, 1999
• Pentium III (650, 667, 700, and 733 MHz)
  • Introduced October 25, 1999
• Pentium(r) III Xeon(tm) Processor built on 0.18 μm process technology (600, 667, and 733 MHz)
  • Introduced October 25, 1999
  • Number of transistors 28 million
  • L2 cache is 256KB Advanced Transfer Cache (Integrated)
  • Processor Package Sytle is Single Edge Contact Cartridge (S.E.C.C.2)
  • System Bus Speed 133 MHz
  • System Bus Width 64 bit
  • Addressable memory 64 gigabytes
  • Used in two-way servers and workstations
• Pentium III (750 and 800 MHz)
  • Introduced December 20, 1999
• Celeron (533 MHz)
  • Introduced January 4, 2000
• Pentium(r) III Xeon(tm) Processor built on 0.18 μm process technology (800 MHz)
  • Introduced January 12, 2000
  • See 600, 667, and 733 for details
• Mobile III with SpeedStep Technology (600 and 650 MHz)
  • Introduced January 18, 2000
• Mobile Celeron (450 and 500 MHz)
  • Introduced February 14, 2000
• Pentium III (1.0 GHz)
  • Introduced March 8, 2000
  • Not widely available at time of release
• Pentium III (850 and 866 MHz)
  • Introduced March 20, 2000
• Celeron (566 MHz)
• Pentium(r) III Xeon(tm) Processor built on 0.18 μm process technology (866 MHz)
  • Introduced April 10, 2000
  • See 600, 667, and 733 chips for details
• Mobile Celeron (550 MHz)
• Mobile Pentium III with SpeedStep Technology (700 MHz)
  • Introduced April 24, 2000
• Pentium(r) III Xeon(tm) Processor built on 0.18 μm process technology (700 MHz)
  • Introduced May 22, 2000
  • L2 cache was 1MB and 2MB Advanced Transfer Cache (Integrated)
  • Processor Package Sytle SC330
  • System Bus Speed 100MHz
  • System Bus Width 64 bit
  • Addressable Memory 64 gigabytes
  • Used in 4- and 8-way servers
• Pentium III (933 MHz)
  • Introduced May 24, 2000
• Pentium(r) III Xeon(tm) Processor built on 0.18 μm process technology (933 MHz)
  • L2 cache was 256KB Advanced Transfer Cache (Integrated)
  • Processor Package Style SC330
  • System Bus Speed 133MHz
  • System Bus Width 64 bit
  • Addressable Memory 64 Gigabytes
  • Used in business and consumer PCs, one and two-way servers and workstations
• Mobile Celeron (600 and 650 MHz)
  • Introduced June 19, 2000
• Mobile Pentium III with SpeedStep Technology (750 MHz)
  • Introduced June 19, 2000
• Low Voltage Mobile Pentium(r) III with Intel(r) SpeedStep(tm) Technology (600 MHz)
  • Introduced June 19, 2000
  • 256KB Advanced Transfer Cache (Integrated)
  • 0.18 μm
  • Package Style: Ball Grid Array (BGA2)
  • Bus Speed 100 MHz
  • Streaming SIMD Extensions
  • Core Voltage 1.1 volts (Battery Optimized Mode)
  • Watts average less than 1 watt (Battery Optimized Mode)
  • Used in Business, Consumer, Education
• Celeron (633, 667, and 700 MHz)
  • Introduced June 26, 2000
• Pentium III Xeon (1.0 GHz)
  • Introduced August 22, 2000
• Mobile Celeron (700 MHz)
  • Introduced September 25, 2000
• Mobile Pentium III with SpeedStop Technology (800 and 850 MHz)
  • Introduced September 25, 2000
• Celeron (733 and 766 MHz)
  • Introduced November 13, 2000
• Pentium(r) 4 Processor built on 0.18 μm process technology (1.40 and 1.50 GHz)
  • Introduced November 20, 2000
  • L2 cache was 256KB Advanced Tansfer Cache (Integrated)
  • Processor Package Style was PGA423, PGA478
  • System Bus Speed 400MHz
  • SSE2 SIMD Extensions
  • Number of Transistors 42 million
  • Used in desktops and entry-level workstations
• Celeron (800 MHz)
• Ultra Low Voltage Mobile Celeron (500 MHz)
  • Introducted January 30, 2001
• Ultra Low Voltage Mobile Pentium(r) III Processor Featuring Intel(r) SpeedStep(tm) Technology (500 MHz)
  • Introducted January 30, 2001
  • Had a 300MHz Battery Optimized Mode
  • 256K Advanced Transfer Cache (Integrated)
  • Packaging: Ball Grid Array (BGA)
  • Bus Speed 100 MHz
  • Voltage 1.1V;<1V in Battery Optimized Mode
  • Wattage: <1watt; <0.5 watt at 300MHz
  • Used in business and comsumer mobile PCs
• Ultra Low Voltage Mobile Pentium III with SpeedStep Technology (600 and 700 MHz)
• Low Voltage Mobile Pentium(r) III with Intel(r) SpeedStep(tm) Technology (700MHz)
  • Introduced February 27, 2001
  • See 600 chip for details
• Mobile Celeron (750 MHz)
  • Introducted March 19, 2001
• Low Voltage Pentium III for Applied Computing (700 MHz)
  • Introducted March 19, 2001
• Mobile Pentium III with SpeedStep Technology (900 MHz and 1.0 GHz)
  • Introducted March 19, 2001
• Pentium(r) III Xeon(tm) Processor built on 0.18 μm process technology (900 MHz)
  • Introduced March 21, 2001
  • L2 cache was 2MB Advanced Transfer Chache (Intergrated)
  • Processor Package Style SC330
  • System Bus Speed 100MHz
  • System Bus Width 64 bit
  • Addressable memory 64 Gigabytes
  • Used in high-end servers, 4-and 8-way multiprocessing systems
• Celeron (850 MHz)
  • Introducted April 9, 2001
• Pentium(r) 4 Processor built on 0.18 μm process technology (1.7 GHz)
  • Introduced April 23, 2001
  • See the 1.4 and 1.5 chips for details
• Mobile Celeron (800 MHz)
• Low Voltage Mobile Celeron (600 MHz)
• Ultra Low Voltage Mobile Celeron (600 MHz)
• Low Voltage Mobile Pentium(r) III with Intel(r) SpeedStep(tm) Technology (750 MHz)
  • Introduced May 21,2001
  • See 600 chip for details
• Ultra Low Voltage Mobile Pentium(r) III Processor Featuring Intel(r) SpeedStep(tm) Technology (600 MHz)
  • Introduced May 21, 2001
  • See 500 chip for details
• Intel(r) Xeon(tm) Processor (1.4, 1.5, 1.7 GHz)
  • Introduced May 21, 2001
  • L2 cache was 256KB Advanced Transfer Chache (Integrated)
  • Processor Package Style was Organic Lan Grid Array 603 (OLGA 603)
  • System Bus Speed 400MHz
  • SSE2 SIMD Extensions
  • Used in high-performance and mid-range dual processor enabled workstations
• Celeron (900 MHz)
  • Introducted July 2, 2001
• Mobile Celeron (850 MHz)
  • Introduced July 2, 2001
• Pentium(r) 4 Processor built on 0.18 μm process technology (1.6 and 1.8 GHz)
  • Introduced July 2, 2001
  • See 1.4 and 1.5 chips for details
  • Core Voltage is 1.15 volts in Maximum Performance Mode; 1.05 volts in Battery Optimized Mode
  • Wattage <1 watt in Battery Optimized Mode
  • Used in full-size and then light mobile PCs
• Mobile Intel(r) Pentium(r) III Processor-M (866 and 933 MHz, 1.00, 1.06, and1.13 GHz)
  • Introduced July 30, 2001
  • Bus speed 133 MHz
  • 0.13 μm
  • 512KB on-die L2 cache
  • Packaging is Micro FCBGA/PGA
  • SIMD Extensions
  • Core Voltage is 1.4 volts in Maximum Performance Mode; 1.15 volts in Battery Optimized Mode
  • Wattage <2 watts in Battery Optimized Mode
  • Used in full-size and thin and light mobile PCs
• Pentium(r) 4 Processor built on 0.18 μm process technology "Willamette" (1.9 and 2.0 GHz)
  • Introduced August 27, 2001
  • See 1.4 and 1.5 chips for details
• Celeron (950 MHz, 1 and 1.10 GHz)
  • Introduced August 31, 2001
• Xeon (2.0 GHz)
  • Introduced September 25, 2001
• Tualatin Pentium III 1.13 1.33 1.4 512k cache 0.13 μm process
• Mobile Pentium III-M (1.2 GHz)
  • Introduced October 1, 2001
• Celeron (1.20 GHz)
  • Introduced October 2, 2001
• Celeron (1.30 GHz)
  • Introduced January 3, 2002
• Pentium® 4 (2 GHz, 2.20 GHz)
  • Introduced January 7, 2002

• Itanium (733 MHz and 800 MHz)
• Itanium 2 (900 MHz and 1 GHz)

• Pentium 4 Processor built on 0.13 μm process technology "Northwood A"(1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6 GHz)
  • 400 MHz system bus.
• Pentium 4 Processor built on 0.13 μm process technology "Northwood B" (2.26, 2.4, 2.53, 2.66, 2.8, 3.06 GHz)
  • 533 MHz system bus. (3.06 includes Intel's hyper threading technology).
• Mobile Intel Pentium 4 - M Processor build on 0.13 μm process technology (1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2, 2.2 GHz)
  • 400 MHz system bus.
• Pentium 4 Processor built on 0.13 μm process technology "Northwood C" (2.4, 2.6, 2.8, 3.0, 3.2 GHz)
  • 800MHz system bus (all versions include Hyper Threading)
  • 6500 to 10000 MIPS

Introduced February 2, 2004:

• Pentium 4E Processor built on 0.09 μm process technology "Prescott" (2.8, 3.0, 3.2, 3.4) 1MB L2 cache
  • 533/800MHz system bus (all versions include Hyper Threading except 2.8 (533))
  • 7500 to 11000 MIPS

• The iAPX 432, introduced in 1981, was a capability processor. It was extremely complex and very slow. And a major flop.
• The i860 series was an attempt to produce a RISC processor for scientific computing.
• Intel produced numerous embedded processors, including the i960 series.

Some Intel related terms:

• x86 - refers to any processor compatible with the 8086
• 286 - refers to 80286
• 386 - refers to 80386
• 486 - refers to 80486
• iAPX - marketing term for processor types used in the late 1980s in an effort to gain trademark protection
• Centrino - a marketing initiative combining a Pentium M processor and a wireless interface.
• Pentium. Intel began naming their chips Pentium instead of following the x86 convention. Numbers cannot be trademarked, and other chip manufacturers were capitalizing on "486-compatible" etc. so they needed name recognition and brand protection. Note that while Pentium connotes an association with 5, Intel retained the name Pentium for many of its later processors for reasons of brand recognition.
• Pentium MMX
• Pentium II, original version codenamed Klamath
• Pentium III
• Pentium 4, codenamed Willamette
• Wintel - refers to a computer running a Microsoft Windows operating system on an Intel processor
• IA-32 - Intel architecture, 32 bit, referring to 80386 through Pentium 4 processors
• IA-64 - New 64-bit architecture designed by Intel and Hewlett-Packard, including backwards compatibility with Intel IA-32 and HP PA-RISC.