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The Interconnect consists of a PCI card in each compute node and one or more a dedicated switch chasses. These are connected with a copper cables. Within the switch chassis are a number of line cards that carry Elite switch ASICs. These are internally linked to form a Fat Tree Topology. Like other interconnects such as Myrinet very large systems can be build by using multiple switch chasses arranged as Spine (top-level) and Leaf (node-level) switches. Such systems are usually called Federated Networks
As of 2003, there are two generations of QsNet. The older QsNET I was launched in 1998 and used PCI 66-64 cards that had 'elan3' Custom ASIC on them. These gave an MPI bandwitdh of around 350MByte/s unidirectional with 5us latency. QsNET II was lauched in 2003. It used PCI-X 133MHz cards that carry 'elan4' ASICs. These give an MPI bandwitdh of around 900MByte/s unidirectional with a latency around 2 us.