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2 Operation modes 3 Instruction overview 4 Mathematical instructions 5 Data manipulation instructions 6 Programming flow |
x86 CPU design
The x86-processor design is CISC; however, since the end of the 1990s it has moved towards being more RISC or VLIW. Modern x86-processors translate their instructions to RISC-like microcodes before they execute them. This gives the x86 a bit more superscalar design, as microcodes can easily be made to execute several at once. This behaviour is however invisible to the assembly programmer.
In general, a modern x86-processor has 7 stages in its pipeline.
stage 1: fetch the code stage 2: decode the code stage 3: register renaming stage 4: translate into microcodes stage 5: execute the microcodes stage 6: collect and summarize the results (out of order-stage) stage 7: save the resultsHowever, most x86-processors have more than 7 stages. For example, the Pentium 4 has a 20-stage deep pipeline. The pipeline does not have to be in this particular order either, but it mostly is. In between steps 4 and 6, the processor behaves more like a RISC/VLIW processor than a CISC processor.
Operation modes
The processor can be operated within different modes of operation, but most notably real mode and protected mode for the i386 architecture, and also long mode for newer processors. The language is essentially the same but involves different ways of accessing memory and thus employs different programming strategies.
For information on the assembly language within a respective mode, see:
Protected mode
Protected mode enables full 32-bit addressing, paging, memory protection, hardware-support for multitasking, a few more registers and some new instructions to handle the 32-bit addressing. The instruction set in protected mode is perfectly backward compatible with the one used in real mode.16-bit protected mode also exists, but almost never used. It was used in early operating systems that needed memory protection. The mode delivers 24-bit addressing, wich gives a maximum capability of 16 megabytes of memory. Some early Unix operating systems used this mode.
x86-family processors boots into real mode for backward compatibility with the older 8086 class of processors. Typically, the operating system is responsible for switching to protected mode if it so wishes. Recently, long mode has been created as a 64-bit environment for the x86-processors. Processors with the ability to change into long mode is said to be belong to the x86-64-family. AMD Athlon64 is one x86-64 processor. To switch to longmode, the processor has to first switch from realmode to protected mode, and then to longmode. This behaviour guarantees backward compatibility.
The way x86-processors can change their processor-mode is remotely similiar to reconfigurable computing.
Itanium-processors can also run x86-code in firmware, with significant performance degradation. Some people claim that the Itanium emulates the x86-code while others says that it does not. It is probably just a matter of definition.
Long mode
Long mode is a mode that enables 64-bit addressing, 64-bit extensions of most registers and some new 64-bit registers as well. It is an extension of the 32-bit instruction set, although some instructions are replaced by new ones making the resultant instruction set not entirely backwards compatible.Instruction overview
Since the x86 class of processors are CISC, they offer a large number of various instructions. Mathematical instructions
x86 assembly has the standard mathematical operations, add, sub, mul, with idiv; the logical operators and, or, xor, neg; bitshift arithmetic and logical, sal/sar,shl/shr, and others.